オグラ　アツシ   Ogura Atusi   小椋　厚志    所属   明治大学  理工学部    職種   専任教授
言語種別	英語
発行・発表の年月	2003
形態種別	国際会議議事録
標題	Sub-10-nm planar-bulk-CMOS devices using lateral junction control
掲載誌名	2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST
出版社・発行元	IEEE
巻・号・頁	pp.989-991
著者・共著者	H Wakabayashi, S Yamagami, T Ikezawa, A Ogura, M Narihiro, T Arai
概要	Sub-10-nm planar-bulk-CMOS devices were clearly demonstrated by a lateral source/drain (S/D) junction control using the precisely-controlled gate-electrode, shallow source/drain extensions (SDE) and steep halo. Good cut-off characteristics were observed for n/pMOSFETs with the gate length of 5 nm at 0.4 V for the first time.
ISSN	0163-1918
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